Field of the Invention
The invention relates to a method for fabricating a semiconductor device, and particularly relates to a method for fabricating a field effect transistor (FET) semiconductor device.
Description of Related Art
A semiconductor device typically includes a core device area and an I/O device area. The core device area may be a FinFET area while the semiconductor device is a FinFET semiconductor device, for example. In a process of fabricating the semiconductor device, a sacrificial gate dielectric layer of the core device and a gate dielectric layer of the I/O device area may be formed at the same time. Since the demand of the gate dielectric layer of the core device and the demand of the gate dielectric layer of the I/O device are different, the sacrificial gate dielectric layer in the core area is removed before forming a desired gate dielectric layer in the core area. For example, the gate dielectric layer in the core area is thinner than the gate dielectric layer in the I/O device area.
However, the removal process for removing the sacrificial gate dielectric layer under the sacrificial gate may cause the loss of the interlayer dielectric layer between the sacrificial gates. That is, a height of the interlayer dielectric layer is decrease. As such, to lower the gate formed in the following steps is needed or a short circuit may happen. Otherwise, the lower gate may cause increasing a resistance of the gate. Therefore, how to prevent the loss of the interlayer dielectric layer in the removal process is certainly an issue to be worked on.